Senior Principal Design Verification Engineer
Dallas, TX, United States
The Integrated Circuit Solutions (ICS) Business Group is a newly formed organization within an established semiconductor company, operating in a new product space from the company’s core businesses. A role in this organization is an opportunity to influence strategy, product definition, topology and architecture, and core IP development at the most fundamental levels. This is a team environment that allows individuals to apply their experience and passion to a new venture. It is a start-up environment, where rethinking the way complex analog and mixed signal ICs are developed is at the core of our team culture. Our team has had rapid growth around the globe every month since inception; if you are looking for career growth, come and join the team!
This organization provides an opportunity to work on cutting edge products in Power and Power Management, Signal Chain, Standard Logic, etc. including DC/DC and AC/DC converters, high voltage isolation, battery chargers, linear regulators, nano power products, display power products, power protection, and more.
Responsibilities Include:
Operate as a team leader to drive quality product tape outs.
Develop the verification environment and lead the DV methodology for the business group.
Understand the product specification and chip architecture and how it behaves to meet the spec.
Develop a detailed pre-Si verification plan and work closely with design and systems teams to execute it.
Develop test benches and automated tests and simulations, run coverage regressions and ensure coverage goals are met.
Interface across different functional groups such as systems, applications, test, silicon validation, etc. to ensure product design was verified correctly and completely and that end product fits customer’s needs
Build relationships with internal team by closely interacting with them to identify and solve design related problems
Required Qualifications:
10+ Years working as a Design Verification Engineer in an Analog environment.
Understanding of and use of AMS
A thorough understanding of semiconductor device physics and advanced node BCD process technologies
Strong familiarity with EDA design tools such as Cadence, and the overall analog/mixed signal tool flow
Working knowledge of Verilog/Verilog-a/UVM SV hardware description language
Working knowledge of Unix shell, TCL, Perl, Python, other scripting languages
A strong background in analog design and power electronics is a plus
Bachelor’s, Master’s or PhD degree in Electrical Engineering or related field of study
Demonstrate strong analytical and problem-solving skills as well as verbal and written communication skills
Demonstrate open mindedness, and an eagerness to learn and think outside the box.
Be passionate about new, innovative methods and technologies
A self-starter with an entrepreneurial attitude able to comprehend the challenges in an IC design flow and act to solve them
Demonstrate an ability to work in teams and collaborate effectively with people in different functions
Strong time management skills that enable on-time deliverables
Demonstrate an ability to work effectively in a fast-paced and rapidly changing environment
Demonstrate an ability to build strong, influential relationships
Nexperia is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, color, creed, religion, national origin, ancestry, citizenship status, age, sex or gender (including pregnancy, childbirth and pregnancy-related conditions), gender identity or expression (including transgender status), sexual orientation, marital status, military service and veteran status, physical or mental disability, genetic information, or any other characteristic protected by applicable federal, state or local laws and ordinances. Nexperia’s management team is dedicated to this policy with respect to recruitment, hiring, placement, promotion, transfer, training, compensation, benefits, TeamNexperian’s activities, access to facilities and programs and general treatment during employment.
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