Associate Staff IP Verification Engineer
Austin, TX, United States
Associate Staff IP Verification Engineer page is loaded Associate Staff IP Verification Engineer Apply locations Austin time type Full time posted on Posted 4 Days Ago job requisition id 19946 We are Silicon Labs.We are a leader in secure, intelligent wireless technology for a more connected world.Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives.
Associate Staff IP Verification Engineer
Austin, TX
Meet the Team
The IoT Digital Design team is a state-of-the-art IC design team focused on producing world class Wireless MCU SoCs. The architecture specification, design, verification, emulation, and implementation of the Wireless MCU SoCs are all the responsibilities of the IoT Digital team. These SoCs include an embedded CPU system with analog and digital peripherals, advanced security, advanced power management, and best in class radios to support a wide range of wireless IoT applications and standards. We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI/ML components.
Associate Staff IP Verification Engineer
The position involves executing a verification plan on digital IP blocks using a combination of simulation and formal verification methodologies. The qualified candidate should have architected a UVM testbench from scratch and taken it through all stages of execution. The candidate will interact with cross-functional teams to receive specs, implement and execute verification plans, and debug IP and system-level simulations.
Responsibilities
Block and IP Verification Architect and implement testbenches using UVM-based methods
Generate and execute verification plan based on specifications
Coverage definition, implementation, and analysis
Architect and implement Formal Verification
Block level verification to validate block performance and adherence to requirements
Architect and implement Verification Components using UVM-based methods
Flows and Methodology
Identify and develop verification flows and methodologies to enhance IP, SoC, Mixed Signal or Formal Verification
Skills You Will Need
10+ years in Industry
Bachelor's or Master's degree in Electrical and/or Computer Engineering
Industry experience developing testbenches and verification components with System Verilog and UVM
Strong knowledge of Verilog, System Verilog, UVM, C/C++.
Advanced verification skill in System Verilog Assertions (SVA)
Constrained random stimulus
Coverage analysis
Knowledge of digital designs using AMBA AHB/AXI/APB based SoC Architecture.
RISC-V and M-class ARM cores
Cache hierarchies
Knowledge of scripting languages like Perl, Python, Tcl, shell.
Knowledge of C Based Testcases.
Mentoring skills.
Exceptional problem-solving skills.
Good written and oral communication skills.
Benefits & Perks
You can look forward to the following benefits:
Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
Highly competitive salary
401k plan with match and Roth plan option
Equity rewards (RSUs)
Employee Stock Purchase Plan (ESPP)
Life/AD&D and disability coverage
Flexible spending accounts
Adoption assistance
Back-Up childcare
Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
Flexible PTO schedule
3 paid volunteer days per year
Charitable contribution match
Tuition reimbursement
Free downtown parking
Onsite gym
Monthly wellness offerings
Free snacks
Monthly company updates with our CEO
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The annualized base pay range for this role is expected to be between $114,428 - $212,510 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
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