Discrete Graphics Hardware Engineer

Santa Clara, CA, United States

Discrete Graphics Hardware Engineer page is loaded Discrete Graphics Hardware Engineer Apply locations US, California, Santa Clara time type Full time posted on Posted 2 Days Ago job requisition id JR0254554 Job Details: Job Description:  You will be responsible for working or assisting in architecture, implementation, formal verification, emulation and validation of discrete graphics products, including: Lead a team of custom designers to produce key assets that help improve product KPI's for discrete graphis products Working with SoC Architecture and platform architecture teams to establish silicon requirements Making appropriate design trade off balancing risk, area, power, performance, validation complexity and schedule Creating micro architectural specification document for the design. Work with external vendors on tools or IPs required for the development of micro-architecture, design and design qualification of custom silicon designs. Drive vendor's methodology to meet world class silicon design standards Architecting area and power efficient low latency designs with scalabilities and flexibilities Power and Area efficient RTL logic design, and DV support Running tools to ensure lint-free and CDC/RDC clean design Synthesis and timing constraints Qualifications: BS+10 Years of relevant industry experience Having achieved multiple tape-outs reaching production with first pass silicon Ability to drive and improve digital design methodology to achieve high quality first silicon Hands on experience with FPGA emulation, silicon bring-up, characterization and debug Able to work with multi-functional teams within Apple and external vendors across geographical boundaries to resolve architectural and implementation challenges with an eye towards schedule Strong verbal and written communication skills Good undersanding of verilog and system verilog, synthesizeable RTL Knowledgeable in modern design techniques and energy-efficient/low power logic design and power analysis Familiarity with power estimation (vector-less and vector-based), modeling, profiling, and post silicon power correlation Background in computer architecture Bus fabric, including, but not limited to APB/AHB/AXI Power management with multiple power domains Proven track record of bringing logic designs into high volume production Ability to work well in a team and be productive under ambitious schedules Should be self-motivated and well organized Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location:  US, California, Santa Clara Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to continue to advance PC experiences to deliver the real-world performance people demand. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$180,270.00-$288,770.00 S al ary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Similar Jobs (5) Physical Design Engineer locations 4 Locations time type Full time posted on Posted 30+ Days Ago SoC Design Engineer locations 4 Locations time type Full time posted on Posted 30+ Days Ago Logic Design Engineer locations 3 Locations time type Full time posted on Posted 30+ Days Ago

Intel provides reasonable accommodation to applicants and employees. For more information on our Reasonable Accommodation process, please click here .

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